Logic Unused Gate Termination

- techniques required to terminate unused gates on a digital or logic board to ensure spurious switch does not introduce noise


Logic / Digital Design Guidelines Includes:
Design guidelines overview     Supply decoupling     PCB groundplane usage     Unused gates    


Another area that is important for any logic or digital circuit design guidelines is the issue of any unused gates.

When a circuit design is completed it is highly likely that there will be spare gates that have not been utilised. In addition to this many chips may have inputs that remain unused.

Design guidelines often state that any un connected inputs should be terminated.


Necessity for terminating gates

Frequently when designing a logic circuit there may be gates or latches that are not used. Additionally some inputs to logic chips that are being used may remain unconnected.

It is important that all inputs to a gate, latch or any function is terminated whether it is in use of not.

There are a number of reasons for this:

  • Gates may switch randomly:   The voltage on an input that is not connected, i.e. floating is indeterminate. It could rise and fall according to the surrounding voltages as a result of capacitance, mutual inductance, etc. This could cause the gate to switch randomly giving rise to unwanted noise on the supply rails, etc..
  • Floating input may rise above specified limits:   The input impedance of many gates is very high. This is true for those chips using CMOS technology where the input impedance will be many megohms. The result of this is that the input voltage can float to voltages well above the specified maximum limits. Consequently the voltage could rise to within the threshold switchover region for the gate. At this point both p-channel and n- channel input transistors conduct resulting in excessive current passing through the package with the possibility of oscillation or damage.
  • Open inputs to used chips and gates may cause random states:   Even though many logic inputs tend to float high, this should not be assumed. Inputs to functions that are in use, but left floating may assume an unwanted state and cause the chip to malfunction.

Remedy for unconnected gate inputs

To ensure that the gates are not left floating they should be connected either to ground or to the supply rail. Often it will not matter which is used, unless it is an input on a used function when the required input, either high or low would mean connecting it to the supply rail or ground respectively.

When linking an input to the supply, often a resistor is used placed between the input and supply. For CMOS chips this is not necessary. It would only be required if spikes on the rail could take the input outside the permissible range (which should not happen for the proper operation of the chip.

More Digital Logic and Embedded Topics:
FPGA programming     Embedded systems     How a computer works     Logic circuit design basics     Logic / circuit design guidelines    
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