There are many ways in which a circuit using a Darlington pair transistor can be implemented. The design example below provides a simple example showing some of the basic principles behind them.
The design example with its calculations is based around an AC coupled emitter follower using a Darlington transistor pair.
This type of circuit example utilises the high gain of the Darlington to provide a high level of buffering. It could be used in many instances without the AC coupling, but it has been incorporated here to illustrate the full design example.
Darlington pair circuit calculations & design example
When designing a circuit using a Darlington pair, exactly the same rules are used as for designing a circuit using a standard transistor. The Darlington pair can be treated as a form of transistor with the differences of the very much higher current gain, and the higher base emitter voltage.
To illustrate how this can be done, the example of an emitter follower circuit is given below.
Step by step instructions:
These instructions in this Darlington pair transistor design example can only be taken as a guide because the actual circuit may differ, or the requirements for the circuit may be different.
- Determine the emitter current: This is usually the starting point for the design. It can be determined from a knowledge of what the output load is.
- Determine the emitter voltage: This would normally be approximately half the rail voltage as this will give the maximum voltage swing at the output.
- Determine the emitter resistor: This is simply the emitter voltage divided by the emitter current. Then choose the nearest available value.
Note: These last stages all depend on each other and it may be necessary to make the calculations in a different order dependent upon what is known.
- Determine the base current: This is simply the emitter current divided by the overall current gain, HFEtot
- Choose the bias point for the Darlington base: This is the emitter voltage plus the overall base-emitter voltage for the Darlington (normally 1.2 to 1.4 volts).
- Choose bias current for the bias potential divide: This is normally chosen to be approximately ten times the base current.
- Calculate the voltage across each resistor in the bias chain: The voltage across the lower resistor is simply the base voltage. The voltage across the upper resistor is the rail voltage less the base voltage.
- Calculate the resistors in the bias chain: The voltage each resistor can be calculated using the voltage in the previous step and is voltage / bias chain current. Then choose the nearest available values from the relevant resistor series. It may be that the circuit is AC coupled. If so the values of the capacitor can be calculated as below:
- Determine the input impedance: This is the emitter resistor times the current gain, in parallel with the lower bias chain resistor, in parallel with the upper bias chain resistor.
- Determine the input capacitor value: The reactance of the input capacitor should be the same as the input impedance at the lowest frequency for a 3 dB roll off. Using the formula for the reactance of 2 pi x (Frequency, f in Hz) x (Capacitance C in farads) or 6 f C determine the value of the capacitor. Choose the next largest capacitance value available to ensure the frequency response is assured.
- Calculate the output impedance: The value of the output impedance can be assumed to be low, and the impedance of the load can be assumed to dominate for most applications.
- Determine the output capacitor value: The reactance of the output capacitor should be the same as the load impedance at the lowest frequency for a 3 dB roll off. Using the formula for the reactance of 2 pi x (Frequency, f in Hz) x (Capacitance C in farads) or 6 f C determine the value of the capacitor. Choose the next higher value of capacitor to ensure the frequency response is assured.
Some of the calculations in the design example are an approximation. In view of the tolerances on the components, they give a good end result.
As with any transistor design, it may be that some iteration of the calculations is required to obtain satisfactory overall results.
By Ian Poole
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