SRAM or Static Random Access Memory is a form of semiconductor memory widely used in electronics, microprocessor and general computing applications. This form of semiconductor memory gains its name from the fact that data is held in there in a static fashion, and does not need to be dynamically updated as in the case of DRAM memory. While the data in the SRAM memory does not need to be refreshed dynamically, it is still volatile, meaning that when the power is removed from the memory device, the data is not held, and will disappear.
There are two key features to SRAM - Static random Access Memory, and these set it out against other types of memory that are available:
- The data is held statically: This means that the data is held in the semiconductor memory without the need to be refreshed as long as the power is applied to the memory.
- SRAM memory is a form of random access memory: A random access memory is one in which the locations in the semiconductor memory can be written to or read from in any order, regardless of the last memory location that was accessed.
The circuit for an individual SRAM memory cell comprises typically four transistors configured as two cross coupled inverters. In this format the circuit has two stable states, and these equate to the logical "0" and "1" states. In addition to the four transistors in the basic memory cell, and additional two transistors are required to control the access to the memory cell during the read and write operations. This makes a total of six transistors, making what is termed a 6T memory cell. Sometimes further transistors are used to give either 8T or 10T memory cells. These additional transistors are used for functions such as implementing additional ports in a register file, etc for the SRAM memory.
Although any three terminal switch device can be used in an SRAM, MOSFETs and in particular CMOS technology is normally used to ensure that very low levels of power consumption are achieved. With semiconductor memories extending to very large dimensions, each cell must achieve a very low levels of power consumption to ensure that the overall chip does not dissipate too much power.
SRAM memory cell operation
The operation of the SRAM memory cell is relatively straightforward. When the cell is selected, the value to be written is stored in the cross-coupled flip-flops. The cells are arranged in a matrix, with each cell individually addressable. Most SRAM memories select an entire row of cells at a time, and read out the contents of all the cells in the row along the column lines.
While it is not necessary to have two bit lines, using the signal and its inverse, this is normal practice which improves the noise margins and improves the data integrity. The two bit lines are passed to two input ports on a comparator to enable the advantages of the differential data mode to be accessed, and the small voltage swings that are present can be more accurately detected.
Access to the SRAM memory cell is enabled by the Word Line. This controls the two access control transistors which control whether the cell should be connected to the bit lines. These two lines are used to transfer data for both read and write operations.SRAM memory applications
There are many different types of semiconductor memory that are available these days. Choices need to be made regarding the correct memory type for a given application. Possibly two of the most widely used types are DRAM and SRAM memory, both of which are used in processor and computer scenarios. Of these two SRAM is a little more expensive than DRAM. However SRAM is faster and consumes less power especially when idle. In addition to this SRAM memory is easier to control than DRAM as the refresh cycles do not need to be taken into account, and in addition to this the way SRAM can be accessed is more exactly random access. A further advantage if SRAM is that it is more dense than DRAM.
As a result of these parameters, SRAM memory is used where speed or low power are considerations. Its higher density and less complicated structure also lend it to use in semiconductor memory scenarios where high capacity memory is used, as in the case of the working memory within computers.
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