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Direct digital synthesis, DDS, is a frequency synthesizer technique that is becoming more widespread.
DDS, direct digital synthesis takes a different approach to that of the more usual indirect frequency synthesis techniques using PLLs by directly synthesising the waveform from a digital map of the waveform stored in a memory.
Using digital techniques in this way, along with high speed logic, direct digital synthesis provides a powerful technique for creating accurate signals whose frequency can be stepped by very small increments giving virtually analogue or continuous tuning if needed.
For many years, direct digital synthesizers were limited in frequency by the speed of the logic. With speeds improving he top frequency limits for direct digital synthesizers is increasing.
How DDS works
As the name suggests this form of synthesis generates the waveform directly using digital techniques. This is different to the way in which the more familiar indirect synthesizers that use a phase locked loop as the basis of their operation.
A direct digital synthesizer operates by storing the points of a waveform in digital format, and then recalling them to generate the waveform. The rate at which the synthesizer completes one waveform then governs the frequency. The overall block diagram is shown below, but before looking at the details operation of the synthesizer it is necessary to look at the basic concept behind the system.
The operation can be envisaged more easily by looking at the way that phase progresses over the course of one cycle of the waveform. This can be envisaged as the phase progressing around a circle. As the phase advances around the circle, this corresponds to advances in the waveform.
The synthesizer operates by storing various points in the waveform in digital form and then recalling them to generate the waveform. Its operation can be explained in more detail by considering the phase advances around a circle as shown in Figure 2. As the phase advances around the circle this corresponds to advances in the waveform, i.e. the greater the number corresponding to the phase, the greater the point is along the waveform. By successively advancing the number corresponding to the phase it is possible to move further along the waveform cycle.
The digital number representing the phase is held in the phase accumulator. The number held here corresponds to the phase and is increased at regular intervals. In this way it can be sent hat the phase accumulator is basically a form of counter. When it is clocked it adds a preset number to the one already held. When it fills up, it resets and starts counting from zero again. In other words this corresponds to reaching one complete circle on the phase diagram and restarting again.
Once the phase has been determined it is necessary to convert this into a digital representation of the waveform. This is accomplished using a waveform map. This is a memory which stores a number corresponding to the voltage required for each value of phase on the waveform. In the case of a synthesizer of this nature it is a sine look up table as a sine wave is required. In most cases the memory is either a read only memory (ROM) or programmable read only memory (PROM). This contains a vast number of points on the waveform, very many more than are accessed each cycle. A very large number of points is required so that the phase accumulator can increment by a certain number of points to set the required frequency.
The next stage in the process is to convert the digital numbers coming from the sine look up table into an analogue voltage. This is achieved using a digital to analogue converter (DAC). This signal is filtered to remove any unwanted signals and amplified to give the required level as necessary.
Tuning is accomplished by increasing or decreasing the size of the step or phase increment between different sample points. A larger increment at each update to the phase accumulator will mean that the phase reaches the full cycle value faster and the frequency is correspondingly high. Smaller increments to the phase accumulator value means that it takes longer to increase the full cycle value and a correspondingly low value of frequency. In this way it is possible to control the frequency. It can also be seen that frequency changes can be made instantly by simply changing the increment value. There is no need to a settling time as in the case of phase locked loop based synthesizer.
From this it can be seen that there is a finite difference between one frequency and the next, and that the minimum frequency difference or frequency resolution is determined by the total number of points available in the phase accumulator. A 24 bit phase accumulator provides just over 16 million points and gives a frequency resolution of about 0.25 Hz when used with a 5 MHz clock. This is more than adequate for most purposes.
These synthesizers do have some disadvantages. There are a number of spurious signals which are generated by a direct digital synthesizer. The most important of these is one called an alias signal. Here images of the signal are generated on either side of the clock frequency and its multiples. For example if the required signal had a frequency of 3 MHz and the clock was at 10 MHz then alias signals would appear at 7 MHz and 13 MHz as well as 17 MHz and 23 MHz etc.. These can be removed by the use of a low pass filter. Also some low level spurious signals are produced close in to the required signal. These are normally acceptable in level, although for some applications they can cause problems.
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