# FET Datasheet Specifications & Parameters

### Many different parameters and specifications appear in FET datasheets - everything from the Vgs to RDSON.

FET, Field Effect Transistor, Tutorial Includes:
FET basics     FET specs     JFET     MOSFET     Dual gate MOSFET     Power MOSFET     MESFET / GaAs FET     HEMT & PHEMT     FinFET technology

FET datasheets contain a host of different parameters and specifications which define the performance of the particular FET type.

When developing a new circuit or replacing an existing FET it is important to understand the different parameters and specifications that appear in the datasheets so that the correct device can be chosen and used..

All the specifications and parameters are important in different applications. Also dependent upon the device, the FET datasheets may quote different parameters which are relevant to the particular for which the device is intended.

## Major FET datasheet specifications & parameters

Some of the main FET specifications used in datasheets are defined below. Some of the parameters are particularly important for different types of FET, e.g. JFET while others may be more applicable to the MOSFET, etc.

• Gate source voltage, VGS :   The FET parameter VGS is the rating for the maximum voltage that can be tolerated between the gate and source terminals. The purpose for including this parameter in the data sheet is to prevent damage of the gate oxide. The actual gate oxide withstand voltage is typically much higher than this but it varies as a result of the tolerances that exist in the manufacturing processes. It is advisable to remain well within this rating so that the reliability of the device is maintained. Often many design rules indicate that the device should only be run to 60 or 70% of this rating.
• Drain-Source Voltage, VDSS:   This is a rating for the maximum drain-source voltage that can be applied without causing avalanche breakdown. The parameter is normally stated for the case where the gate is shorted to the source and for a temperature of 25°C. Depending on temperature, the avalanche breakdown voltage could actually be less than the VDSS rating.

When designing a circuit, it is always best to leave a significant margin between the maximum voltage to be experienced and the VDSS specification. Often they may be run at around 50% VDSS to ensure reliability.
• Gate reverse leakage current , Igss:

• Threshold voltage VGS(TH) :   The threshold voltage VGS(TH) is the minimum gate voltage that can form a conducting channel between the source and the drain. It is normally quoted for a given source drain current.
• Drain current at zero gate voltage , Idss :   This FET parameter is the maximum continuous current the device can carry with the device fully on. Normally it is specified for a particular temperature, typically 25°C.

This FET specification is based on the junction-to-case thermal resistance rating RθJC (junction / channel temperature) and the case temperature.

This FET parameter is of particular interest for power MOSFETs and when determining the maximum current parameter no switching losses are accounted for. Also holding the case at 25°C is not feasible in practice. As a result the actual switching current should be limited to less than half of the Idss at TC = 25°C rating in a hard switched application. Values of a third to a quarter are commonly used.
• Gate source cut-off voltage , VGS(off):   The gate source cut-off voltage is really a turn-off specification. It defines the threshold voltage for a given residual current, so the device is basically off but on the verge of turning on. The threshold voltage has a negative temperature coefficient, i.e. it decreases with increasing temperature. This temperature coefficient also affects turn-on and turn-off delay times which has an impact on some circuits.
• Forward transconductance, Gfs :
• Input capacitance, Ciss :   The input capacitance parameter for a FET is the capacitance that is measured between the gate and source terminals with the drain shorted to the source for AC signals. In other words this is effectively the capacitance between the gate and channel. Ciss is made up of the gate to drain capacitance Cgd in parallel with the gate to source capacitance Cgs. This can be expressed as:
${C}_{\mathrm{iss}}={C}_{\mathrm{gs}}+{C}_{\mathrm{gd}}$
• Drain-source on resistance, Rds(on) :   With the FET turned hard on, this is the resistance in ohms exhibited across the channel between the drain and source. It is particularly important in switching applications from logic to power switching as well as in RF switching, including applications in mixers. FETs typically are able to provide a good performance for switching and have a relatively low Rds(on) value.
• Power dissipation, Ptot :   This FET specification details the maximum continuous power that the device can dissipate. The power dissipation is normally specified in free standing in air, or with the base held at a given temperature, typically 25°C. The actual conditions, whether held in a heat-sink, or in free air will depend upon the device types and the manufacturer. Obviously power FETs are more likely to detailed in a condition where they are held on a heatsink, whilst the free air condition is applicable to signal FETs.

FET datasheets contain a host of different parameters and specifications to define the performance of the FET. These are all set out in the various datasheets that will enable the correct choice of FET to be made.